Teaching a Quantum Computer to Tune Itself Automated Bring Up for a Superconducting Processor

This application covers a calibration process for a quantum computing system, in which the processor is divided into domains and a control system measures each domain, decides what to measure next based on what it found, and derives the control parameters needed to operate the qubits. Those parameters are stored on a special purpose logic circuitry controller sitting close enough to the processor for low-latency communication. The applicant is Rigetti, the Californian company that builds superconducting quantum processors and the control stack around them.

The Problem

A superconducting quantum processor is not a device that arrives configured. Qubits are built from Josephson junctions patterned on a chip, and fabrication tolerances mean every one of them lands somewhere slightly different from where the design said it would. Each qubit has its own transition frequency, its own coupling to its readout resonator, its own response to a flux bias. None of those numbers is known until the chip has been cooled to millikelvin temperatures in a dilution refrigerator and measured in place.

So the machine has to be characterised after installation, and then the pulses that implement its logic gates have to be tuned against the characterisation. Historically this was done by physicists at a bench, one device at a time, with judgement applied at every step about whether a scan had worked and what to sweep next. That approach is workable for a handful of qubits and untenable for hundreds. It also has to be repeated: parameters drift, so a system that was calibrated last week is not necessarily calibrated today.

There is a subtler difficulty in the ordering. Measurements in this domain are not independent. Some only produce meaningful results if certain control parameters or device characteristics are already known to sufficient precision, which means the sequence of experiments is itself a constraint to be respected rather than a list to be worked through. And measurements fail in different ways. A scan range that was too narrow or a signal that needed more averaging is recoverable by repeating with new parameters; a genuinely bad device is not, and the difference has to be decided automatically if no one is watching.

Finally, once the parameters are known they have to be somewhere useful. Control parameters that live on a distant server are of limited value to a system whose operations are measured in nanoseconds and whose qubits lose coherence in microseconds.

What This Invention Does

The organising idea is the domain. The control system identifies domains within the quantum computing system, each comprising a domain control subsystem and a subset of the quantum circuit devices in the processor, which may be qubit devices, coupler devices and readout devices. Domains can be defined by hardware, by control logic, by connections or in software. Because each domain is characterised by its own subsystem, multiple instances of the calibration process can run in parallel across the chip, which is what turns a linear bench procedure into something that scales.

Within a domain the process is adaptive rather than fixed. A first set of measurements is obtained; device characteristics are determined from them; and then, based on those characteristics, the system determines whether and what to measure second. The second set of measurements yields the quantum logic control parameters for that subset of devices. Each measurement block returns both the extracted values and a member of a discrete set of outputs used to choose the next measurement, which is how the failure logic is expressed: a recoverable problem selects a repeat with new parameters, an unrecoverable one exits to a failure state. Whether a measurement succeeded is decided statistically, using goodness of fit metrics such as a reduced chi-squared statistic, the Akaike Information Criterion or the Bayesian Information Criterion, or by machine learning.

Success is defined against the design. In continuous wave cavity spectroscopy, for example, the fitted resonator quality factor and resonant frequency are compared with the designed values, and the measured Lamb shift is compared with the predicted one, with a conformance window specified for each. That comparison is what lets the system decide on its own whether a qubit is addressable through a given drive line and whether the chip as a whole should be declared working or flagged as sub-optimal.

The full sequence runs in stages: continuous wave bring-up, where measurements are made over timescales much longer than the qubits’ coherent lifetimes; pulsed bring-up, over timescales shorter than those lifetimes; single-qubit gate tune-up; and multi-qubit gate tune-up. The system is then operated, and individual domains, subsystems or devices are recalibrated by iterating the same stages. Underneath, an embedded operating system, described as a real-time kernel running on an FPGA, acts as central controller. It draws on separate stores of design predictions, data models for extracting parameters, and constraints defining the success criteria, and dispatches parallel processes to per-domain stacks each containing a controller with its own cache, digital-to-analogue and analogue-to-digital conversion, filtering and amplification.

Key Features

• Processor divided into domains. The system identifies domains of quantum circuit devices, each with its own control subsystem, so calibration can proceed in parallel across the chip.
• Measurement-driven branching. What is measured second depends on the device characteristics extracted from the first set of measurements, rather than following a fixed script.
• Design values as the pass criterion. Fitted parameters such as resonator quality factor, resonant frequency and Lamb shift are compared against design intent within specified conformance windows.
• Automatic failure classification. Statistical goodness of fit measures or machine learning determine whether a measurement is retried with new parameters or the procedure exits to a failure state.
• Parameters stored close to the hardware. Quantum logic control parameters are held in a database on a special purpose logic circuitry controller that has low-latency communication with the quantum processor.
• Staged bring-up and recalibration. Continuous wave, pulsed, single-qubit gate and multi-qubit gate stages run in sequence at initialisation and can be re-run against any domain during operation.

Who Is Behind It

Rigetti & Co, LLC is the operating entity of Rigetti Computing, founded in 2013 by Chad Rigetti and based in Berkeley, California. The company is unusual in the sector for being vertically integrated, fabricating its own superconducting chips at an in-house foundry and building the control electronics and cloud software that surround them, and it has offered access to its machines over the internet since the launch of its Forest environment and Quantum Cloud Services. It listed publicly in 2022.

The inventor list runs to ten names and reads as a snapshot of the company’s early technical staff: Shane Arthur Caldwell, William J. Zeng, Matthew J. Reagor, Chad Tyler Rigetti, Peter Jonathan Karalekas, Nikolas Anton Tezak, Nasser Alidoust, Benjamin Jacob Bloom, Eyob A. Sete and Michael James Curtis. Chad Rigetti is the founder, and led the company as chief executive until stepping down in 2022. Will Zeng was one of the earliest employees and led the software and applications team through the launch of Forest; he later became head of quantum research at Goldman Sachs and founded the Unitary Fund. A ten-inventor filing on a calibration procedure is itself informative, since it indicates the process was assembled from the working practice of the whole hardware and software group rather than devised by one person.

The application is a divisional of Australian application 2024204410. The family claims priority from United States provisional application 62/469,648, entitled “Performing a Calibration Process in a Quantum Computing System” and filed on 10 March 2017.

Why It Matters

Public discussion of quantum computing is dominated by qubit counts and gate fidelities, but the number that determines whether a machine is useful to anyone outside the lab is how much of the time it is calibrated and available. A processor that requires a week of expert attention after each cooldown, and drifts out of tune between sessions, cannot be sold as a cloud service. Automating bring-up is the difference between a physics experiment and an instrument, and it is the kind of engineering that rarely makes headlines while quietly setting the ceiling on everything above it.

The technical direction here is characteristic of the period. Calibration is treated as a software problem with a defined procedure, explicit pass and fail criteria, and a database of expected values against which measurements are judged, and the parameters that result are pushed down onto programmable logic sitting beside the refrigerator rather than kept in a remote control room. That pattern, of moving decisions closer to the hardware while keeping the orchestration in software, has since become standard across the field, and it is the same architecture that makes real-time feedback and eventually quantum error correction practical.

The filing behaviour is worth reading as well. A 2017 priority date pursued through to a divisional filed in 2026 covers a period in which Rigetti went from a private startup to a listed company, and in which several competitors converged on similar automated calibration approaches. For a hardware company whose commercial position depends on both its chips and its control stack, holding claims over how a machine tunes itself is a defensible piece of ground that sits underneath any particular qubit design.

Related Concepts

• Superconducting quantum computing – the hardware platform the calibration process is built for.
• Josephson junction – the circuit element whose fabrication variability makes calibration necessary.
• SQUID – the loop structure used in the qubit devices described in the specification.
• Dilution refrigerator – the operating environment a processor must be characterised inside.
• Field-programmable gate array – the programmable hardware hosting the embedded controller and parameter store.
• Quantum error correction – the longer term goal that depends on reliably calibrated, low-latency control.

---

AU 2026202097 was published in the Australian Official Journal of Patents on 9 April 2026 and is open for public inspection. Patent applications represent inventions that are sought to be protected and do not necessarily reflect commercially available products.